In recent years, high integration of semiconductor devices has progressed. However, when a plurality of highly-integrated semiconductor devices are placed on a horizontal plane and are connected by wirings for production, wiring length may be increased, which results in an increase in wiring resistance and wiring delay.
To overcome this problem, there has been proposed a three dimensional integration technique for stacking semiconductor devices in three dimensions. In this three dimensional integration technique, a substrate incorporating integrated circuits is divided into chips, and chips verified as chips having low defects through a test for determining chips having low defects performed before the divided chips are selected and stacked on another substrate to form a three dimensional stack (stack chip).
Such a stack chip is typically manufactured as follows. (1) A cohesive sheet such as a dicing tape or a backgrinding tape is attached to a substrate formed with semiconductor devices from a device-formed side in which the semiconductor devices are formed. (2) The substrate having the cohesive sheet attached to the device-formed side is grinded and thinned to a predetermined thickness from the opposite side to the device-formed side, that is, the back side of the substrate. (3) The thinned substrate is diced with the cohesive sheet attached to the substrate and is divided into individual chips, which are then detached from the cohesive sheet and are stacked.
The chip stacking is realized by overlaying chips by forming a film by means of plating using Sn, Cu or the like on through electrodes formed on the chips or by arranging solder balls on the through electrodes, deoxidizing the chips by means of a flux or the like in a heating apparatus, and bonding the chips together by pressurization under the condition of a solder melting point or higher.
The semiconductor device manufacturing method using such a three dimensional integration technique requires a high processing precision for the through electrodes arranged and interconnected on the chips. In addition, there is a need of processing of a flux used for soldering and an adhesive or a sticking agent for temporarily fixing the stacked chips.